The invention relates to the process of forming films of material on semiconductor wafers through the use of carrier gases within a reactor chamber. In particular, the present invention relates to the epitaxial deposition of specific materials onto a silicon wafer and to a system and method for reducing or eliminating particulate matter and the resulting particle-related defects on the finished wafer.
In most semiconductor manufacturing equipment used for growth of films of material onto semiconductor wafers, the wafers are loaded in one or multiple load locks and transported through a wafer handling chamber to a reactor, where the actual material is deposited onto the semiconductor wafers by means of gases or vapors. The gas in the load lock, wafer handling chamber and reactor must be as particle-free as possible in order to reduce the number of defects on the semiconductor wafer surface.
Improvements in the capabilities of semiconductor manufacturing equipment continues at an astonishing rate. As capabilities of lithography and etching equipment increases the circuit density on a wafer increases and with the increase in circuit density the specification for particle free environment within the processing equipment also increases. In addition to the resulting circuit density that has been achieved with the improvements in lithography and etching, the size of wafers has increased to 300 mm. Semiconductor manufacturers require further production improvements through the increase in the yields of semiconductor devices from the equipment use to manufacture those devices. The implementation of epitaxial layers, both homoepitaxial and heteroepitaxial, on an underlying substrate layer has a great impact on the yields of the associated semiconductor wafers. A primary example is the growth of epitaxial silicon on a semiconductor wafer substrate. Growth of an epitaxial silicon layer is typically performed in a chemical vapor deposition process in which the wafers are heated while a gaseous silicon compound is passed over the wafer to affect pyrolysis or decomposition. Epitaxial depositions in general and silicon epitaxial deposition in particular are integral parts of VLSI processing, especially for the advanced bipolar, NMOS and CMOS technologies, since many of the components of the individual transistors and devices are formed in an epitaxial layer.
The ability to process good quality advanced NMOS, CMOS and bipolar IC chips using epitaxy is strongly dependent on maintaining a substantially defect-free state (1) for the bulk semiconductor wafer and for the surface of the bulk wafer, and (2) during the step of depositing the epitaxial silicon layer. Simply put, and as discussed below, elimination ofboth sub-surface and surface defects is crucial to obtaining good yields in current and future technologies, particularly as those technologies process toward a sub-micron minimum device feature size.
Surface defects are usually related to undesirable particles. It is extremely critical for sub-micron minimum device feature sizes and for large chip areas that the undesirable particles be eliminated, since a single defect in such devices can cause nonfunctionality of the device and as few as one defect per square centimeter (about 80 defects per four inch wafer) can have catastrophic effects on wafer processing yields. It is a characteristic of epitaxial processing that the crystallographic nature and defect level of the deposited epitaxial layer or epi layer reflects the parent or bulk substrate wafer. Thus, for example, stacking faults on the substrate can give rise to epitaxial stacking faults, and dislocations in the substrate can be transmitted through the epi layer. In addition, epitaxial defects such as pits and micro-contamination result from the bulk substrate wafer surface particles. As a consequence, even where the parent substrate is substantially defect-free (the introduction of substantially defect-free silicon wafer starting material in the mid 1970""s offered this possibility), the growth of defect-free epitaxial layers requires the elimination of particles on the surface of the parent substrate wafer. Unfortunately, using present day epitaxial processing technology, the elimination or substantial decrease in unwanted particles and the associated achievement of very low particle-related defect densities are accomplished by extensive runs and wafer inspection resulting in very low wafer yields.
Although the semiconductor manufacturing equipment is constructed so that particles cannot enter through the walls or with the gas flow, particles may enter the semiconductor manufacturing equipment by other means, such as when semiconductor wafers are put into a load lock, during equipment maintenance or through some other indirect source. Particles generated during the process are removed by the laminar flow of the purge gas. The particles may be transported to the inner surfaces of the equipment and adhere thereon. If particles are present in the gas, or suddenly released from the inner surfaces of the equipment, the particles may be transported to the surface of the semiconductor wafer and cause defects. Undesirable particles including the particles that are to be deposited on the semiconductor wafer during the manufacturing process can be attracted to, deposited and retained on the inner surfaces of the semiconductor manufacturing equipment. Once attracted to the inner surfaces of the semiconductor manufacturing equipment, several different forces including molecular forces (Van der Waals force), capillary forces, and electrostatic forces retain the undesirable particles on the inner surfaces of the semiconductor manufacturing equipment. If for some reason these particles were to be released then they can become airborne and settle on the surfaces of the semiconductor wafers and create defects in the resulting processed wafer. Air turbulence is one way in which these undesirable particles may be freed from their attachment to the inner surfaces of the semiconductor manufacturing equipment.
Once airborne the movement of particles inside the semiconductor manufacturing equipment is subject to several different forces; gravity, the fluid drag of surrounding gas flow, and electrostatic force. Gravity is a very weak force on small particles. Normally, a purge with a particle-free gas is maintained through the semiconductor manufacturing equipment in order to create a particle-free environment. Any particles that are released from the inner surfaces of the equipment are transported by the fluid drag of the purge gas to the gas exhaust. However, electrostatic force negatively affects the removal of particles by the purge gas flow. Particles may be transported to semiconductor wafers by the electrostatic force and remain there during the processing of the semiconductor wafer which will result in defects on the surface of the wafers.
Retention of particles by electrostatic force is erratic since a sudden electrostatic discharge may remove the electrostatic force. The particles released from the inner walls of the equipment may be transported to the surface of a semiconductor wafer and cause defects. Thus it is desirable to eliminate the electrostatic force between particles and the inner walls of the semiconductor manufacturing equipment, so the gas purge flow can remove the retained particles from the inner surfaces of the equipment.
It takes a large amount of energy to release the particles that are retained on the inner surfaces by molecular force. Therefore particles that are retained by the molecular force on the inner surfaces of the equipment are very likely to stay there indefinitely and not cause any defects on semiconductor wafers.
Capillary force is reduced by the reduction of moisture in the equipment. The moisture is reduced by use of construction materials with low moisture permeability and the use of a particle and moisture free gas flow through the equipment. A dry particle-free gas purge such as dry nitrogen evaporates moisture and purges particles that are only being retained by the capillary force on the inner surfaces of the equipment.
U.S. Pat. No. 5,373,806 to Logar (Logar) is an example of an attempt to solve the problem of retained particles. In Logar, electrostatic charges are reduced by heating the substrate to a specific temperature lower than the processing temperature prior to production deposition by the use of a radiant source of energy. This is an extra step that must be taken in the manufacturing process, increasing production time and cost.
Typically particles are removed from the inner surface of the wafer handling chamber and the load locks by purging the wafer handling chamber with a particle-free gas. The semiconductor wafers are transported through the wafer handling chamber and load locks. A laminar flow of gas is provided so that particles can be picked up and carried with the purge gas through an exhaust outlet located within the wafer handling chamber and load locks. However, when a sudden pressure or flow change occurs, the gas flow becomes turbulent, causing particles to be stirred up and transported to the surface of any semiconductor wafer that happen to be in the wafer handling chamber.
Existing systems used to regulate the pressure inside the semiconductor manufacturing equipment often employ the use of a single stage back pressure regulator that is located between a processing chamber and an exhaust outlet. However, the single stage back pressure regulator has difficulty regulating pressure for a large flow of gas.
Another problem with the existing system occurs when a gate valve that isolates the wafer handling chamber from the load lock or processing chamber is opened. If there is a pressure difference between the two chamber, the gas flow in one chamber is diverted to the second chamber, which results in turbulence within the both chambers. Because the single stage back pressure regulators do not completely open, particles, vapors and gases back stream from the exhaust outlet into both chambers.
Thus, it would be a distinct advantage to have an apparatus and method for reducing particles in a epitaxial reactor during the processing of semiconductor wafers. It is an object of the present invention to provide such an apparatus and method.
A method and apparatus for reducing particles in an epitaxial reactor used in processing of semiconductor wafers and includes an enclosure for processing the semiconductor wafers. A purge gas delivery system removes undesirable particles from the enclosure. Included in the system is a pilot operated back pressure regulator for regulating the exhaust of the purge gas from the enclosure.
The system also includes an ionizing source for conditioning the purge gas that is integrally connected to the purge gas delivery system.
The pilot operated back pressure regulator includes a dome regulator for adjusting purge gas flow, a valve for actuating the dome regulator, and a pressure regulator for delivering the pilot gas to the dome regulator.
The enclosure has a wafer handling chamber and a processing chamber. A robotic arm located within the wafer handling chamber has a Bernoulli wand end affecter that lifts and transporting the semiconductor wafers between the wafer handling chamber and processing chamber. There is included a damper mechanism for dampening the pressure rise when the Bemoulli wand releases a wafer either into a wafer cassette or on to a wafer scepter located within the processing chamber.
The wafer handling chamber is connected by an isolating gate valve to the processing chamber. The isolating gate valve is opened and closed according to a procedure that reduces the disturbances when there is a pressure difference between the wafer handling chamber and the processing chamber.